SiC Substrate SiC Epi-wafer conductive / semi-hom 4 6 8 nti
SiC Substrate SiC Epi-wafer Luv luv
Peb muab tag nrho cov ntaub ntawv zoo ntawm SiC substrates thiab sic wafers nyob rau hauv ntau yam polytypes thiab doping profiles-xws li 4H-N (n-hom conductive), 4H-P (p-type conductive), 4H-HPSI (high-purity semi-insulating), thiab 6H-P (p-type conductive), 8 ″, txoj kab uas hla. 12″. Tshaj li cov substrates liab qab, peb cov kev pabcuam kev loj hlob epitaxial (epi) wafers nrog nruj tswj thickness (1-20 µm), doping concentrations, thiab defect ntom ntom.
Txhua lub sic wafer thiab epi wafer tau soj ntsuam nruj hauv kab (micropipe ntom <0.1 cm⁻², nto roughness Ra <0.2 nm) thiab tag nrho hluav taws xob characterization (CV, resistivity mapping) kom paub meej tshwj xeeb siv lead ua uniformity thiab kev ua tau zoo. Txawm hais tias siv rau cov khoom siv hluav taws xob hluav taws xob, cov khoom siv hluav taws xob ntau zaus RF, lossis cov khoom siv hluav taws xob optoelectronic (LEDs, photodetectors), peb cov khoom siv SiC substrate thiab epi wafer xa cov kev ntseeg siab, thermal stability, thiab kev puas tsuaj lub zog xav tau los ntawm niaj hnub no cov kev xav tau tshaj plaws.
SiC Substrate 4H-N yam khoom thiab daim ntawv thov
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4H-N SiC substrate Polytype (Hexagonal) Structure
Dav bandgap ntawm ~ 3.26 eV ua kom ruaj khov hluav taws xob ua haujlwm thiab thermal robustness nyob rau hauv high-temperature thiab high-electric-field tej yam kev mob.
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SiC substrateN-Type Doping
Precisely tswj nitrogen doping yields carrier concentrations ntawm 1 × 10¹⁶ mus rau 1 × 10¹⁹ cm⁻³ thiab chav-kub electron mobilities mus txog ~ 900 cm² / V·s, minimizing conduction losses.
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SiC substrateWide Resistivity & Uniformity
Muaj kev tiv thaiv ntau ntawm 0.01-10 Ω·cm thiab wafer thicknesses ntawm 350-650 µm nrog ± 5% kam rau ua ob qho tib si doping thiab thickness-zoo tagnrho rau high-power device fabrication.
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SiC substrateUltra-Low Defect Density
Micropipe ntom <0.1 cm⁻² thiab basal-plane dislocation ceev <500 cm⁻², xa> 99% ntaus ntawv tawm los thiab superior siv lead ua kev ncaj ncees.
- SiC substrateExceptional Thermal conductivity
Thermal conductivity mus txog ~ 370 W / m·K ua kom yooj yim tshem tawm cov cua sov, txhawb cov cuab yeej kev ntseeg tau thiab lub zog ceev.
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SiC substrateDaim phiaj siv
SiC MOSFETs, Schottky diodes, fais fab modules thiab RF li rau hluav taws xob-tsheb tsav tsheb, hnub ci inverters, industrial drives, traction systems, thiab lwm yam xav tau lub hwj chim-electronics kev lag luam.
6inch 4H-N hom SiC wafer tus specification | ||
| Khoom | Zero MPD Qhuav Qib (Z Qib) | Qib Dummy (D qib) |
| Qib | Zero MPD Qhuav Qib (Z Qib) | Qib Dummy (D qib) |
| Txoj kab uas hla | 149.5 hli - 150.0 hli | 149.5 hli - 150.0 hli |
| Poly-hom | 4H | 4H |
| Thickness | 350 µm ± 15 µm | 350 µm ± 25 µm |
| Wafer Orientation | Tawm axis: 4.0 ° mus rau <1120> ± 0.5 ° | Tawm axis: 4.0 ° mus rau <1120> ± 0.5 ° |
| Micropipe ntom ntom | ≤ 0.2 cm² | ≤ 15 cm² |
| Kev tiv thaiv | 0.015 - 0.024 Ω·cm | 0.015 - 0.028 Ω·cm |
| Thawj Txoj Kev Ncaj Ncees | [10-10] ± 50° | [10-10] ± 50° |
| Qhov Loj Loj Loj | 475 hli ± 2.0 hli | 475 hli ± 2.0 hli |
| Ntug Exclusion | 3 hli | 3 hli |
| LTV/TIV/Bow/Warp | ≤ 2.5 µm / ≤ 6 µm / ≤ 25 µm / ≤ 35 µm | ≤ 5 µm / ≤ 15 µm / ≤ 40 µm / ≤ 60 µm |
| Roughness | Polish Ra ≤ 1 nm | Polish Ra ≤ 1 nm |
| CMP Rau | ≤ 0.2nm | ≤ 0.5nm |
| Ntug Cracks Los ntawm High Intensity Light | Kev sib sau ntev ≤ 20 hli ib qhov ntev ≤ 2 hli | Kev sib sau ntev ≤ 20 hli ib qhov ntev ≤ 2 hli |
| Hex Phaj Los Ntawm Lub Teeb Siab Siab | Qhov ntau thiab tsawg ≤ 0.05% | Cov cheeb tsam ≤ 0.1% |
| Polytype Areas Los Ntawm Lub Teeb Siab Siab | Qhov ntau thiab tsawg ≤ 0.05% | Qhov ntau thiab tsawg ≤ 3% |
| Visual Carbon suav nrog | Qhov ntau thiab tsawg ≤ 0.05% | Qhov ntau thiab tsawg ≤ 5% |
| Silicon Surface Scratches Los ntawm High Intensity Light | Qhov ntev ntev ≤ 1 wafer txoj kab uas hla | |
| Ntug Chips Los ntawm High Intensity Light | Tsis muaj kev tso cai ≥ 0.2 mm dav thiab qhov tob | 7 tso cai, ≤ 1mm txhua |
| Threading Screw Dislocation | <500 cm³ | <500 cm³ |
| Silicon Surface Contamination Los ntawm High Intensity Light | ||
| Ntim | Multi-wafer Cassette lossis Ib Lub Thawv Wafer | Multi-wafer Cassette lossis Ib Lub Thawv Wafer |
8inch 4H-N hom SiC wafer tus specification | ||
| Khoom | Zero MPD Qhuav Qib (Z Qib) | Qib Dummy (D qib) |
| Qib | Zero MPD Qhuav Qib (Z Qib) | Qib Dummy (D qib) |
| Txoj kab uas hla | 199.5mm - 200.0 hli | 199.5mm - 200.0 hli |
| Poly-hom | 4H | 4H |
| Thickness | 500 µm ± 25 µm | 500 µm ± 25 µm |
| Wafer Orientation | 4.0 ° mus rau <110> ± 0.5 ° | 4.0 ° mus rau <110> ± 0.5 ° |
| Micropipe ntom ntom | ≤ 0.2 cm² | ≤ 5 cm² |
| Kev tiv thaiv | 0.015 - 0.025 Ω·cm | 0.015 - 0.028 Ω·cm |
| Noble Orientation | ||
| Ntug Exclusion | 3 hli | 3 hli |
| LTV/TIV/Bow/Warp | ≤ 5 µm / ≤ 15 µm / ≤ 35 µm / 70 µm | ≤ 5 µm / ≤ 15 µm / ≤ 35 µm / 100 µm |
| Roughness | Polish Ra ≤ 1 nm | Polish Ra ≤ 1 nm |
| CMP Rau | ≤ 0.2nm | ≤ 0.5nm |
| Ntug Cracks Los ntawm High Intensity Light | Kev sib sau ntev ≤ 20 hli ib qhov ntev ≤ 2 hli | Kev sib sau ntev ≤ 20 hli ib qhov ntev ≤ 2 hli |
| Hex Phaj Los Ntawm Lub Teeb Siab Siab | Qhov ntau thiab tsawg ≤ 0.05% | Cov cheeb tsam ≤ 0.1% |
| Polytype Areas Los Ntawm Lub Teeb Siab Siab | Qhov ntau thiab tsawg ≤ 0.05% | Qhov ntau thiab tsawg ≤ 3% |
| Visual Carbon suav nrog | Qhov ntau thiab tsawg ≤ 0.05% | Qhov ntau thiab tsawg ≤ 5% |
| Silicon Surface Scratches Los ntawm High Intensity Light | Qhov ntev ntev ≤ 1 wafer txoj kab uas hla | |
| Ntug Chips Los ntawm High Intensity Light | Tsis muaj kev tso cai ≥ 0.2 mm dav thiab qhov tob | 7 tso cai, ≤ 1mm txhua |
| Threading Screw Dislocation | <500 cm³ | <500 cm³ |
| Silicon Surface Contamination Los ntawm High Intensity Light | ||
| Ntim | Multi-wafer Cassette lossis Ib Lub Thawv Wafer | Multi-wafer Cassette lossis Ib Lub Thawv Wafer |
4H-SiC yog cov khoom siv ua haujlwm siab siv rau cov khoom siv hluav taws xob hluav taws xob, RF cov khoom siv, thiab cov ntawv thov kub. Lub "4H" yog hais txog cov qauv siv lead ua, uas yog hexagonal, thiab "N" qhia txog hom doping siv los ua kom cov khoom ua tau zoo.
Cov4 H-SiChom yog feem ntau siv rau:
Lub zog Electronics:Siv rau hauv cov khoom siv xws li diodes, MOSFETs, thiab IGBTs rau cov tsheb fais fab fais fab, cov tshuab ua haujlwm, thiab cov tshuab hluav taws xob tauj dua tshiab.
5G Technology:Nrog 5G qhov kev thov rau cov khoom siv hluav taws xob ntau thiab ua haujlwm siab, SiC lub peev xwm los tswj cov hluav taws xob siab thiab ua haujlwm ntawm qhov kub siab ua rau nws zoo tagnrho rau lub hauv paus chaw nres tsheb fais fab amplifiers thiab RF li.
Solar Energy Systems:SiC cov khoom siv hluav taws xob zoo heev yog qhov zoo tagnrho rau photovoltaic (hnub ci zog) inverters thiab converters.
Electric Vehicles (EVs):SiC yog dav siv nyob rau hauv EV powertrains rau ntau npaum li cas zog hloov dua siab tshiab, txo tshav kub tiam, thiab ntau zog density.
SiC Substrate 4H Semi-Insulating yam khoom thiab daim ntawv thov
Khoom:
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Micropipe-free density control techniques: Xyuas kom tsis muaj micropipes, txhim kho cov substrate zoo.
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Monocrystalline tswj cov txheej txheem: Guarantees ib qho qauv siv lead ua rau cov khoom siv kho kom zoo.
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Cov txheej txheem tswj kev suav nrog: Minimizes lub xub ntiag ntawm impurities los yog inclusions, kom ntseeg tau ib tug ntshiab substrate.
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Cov txheej txheem tswj kev tiv thaiv: Tso cai rau kev tswj xyuas cov hluav taws xob tiv taus, uas yog qhov tseem ceeb rau kev ua haujlwm ntawm cov cuab yeej.
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Cov txheej txheem tswj thiab tswj cov impurity: Tswj thiab txwv cov kev taw qhia ntawm impurities kom muaj kev ncaj ncees ntawm substrate.
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Substrate kauj ruam dav tswj cov txheej txheem: Muab kev tswj xyuas qhov tseeb ntawm cov kauj ruam dav, kom ntseeg tau tias muaj kev sib xws ntawm cov substrate
6Inch 4H-semi SiC substrate specification | ||
| Khoom | Zero MPD Qhuav Qib (Z Qib) | Qib Dummy (D qib) |
| Txoj kab uas hla (mm) | 145mm-150 hli | 145mm-150 hli |
| Poly-hom | 4H | 4H |
| Thickness (hli) | 500 ± 15 | 500 ± 25 |
| Wafer Orientation | axis: ± 0.0001 ° | axis: ± 0.05 ° |
| Micropipe ntom ntom | ≤ 15 cm-2 | ≤ 15 cm-2 |
| Kev tiv thaiv (Ω cm) | ≥10E3 | ≥10E3 |
| Thawj Txoj Kev Ncaj Ncees | (0-10) ° ± 5.0 ° | (10-10) ° ± 5.0 ° |
| Qhov Loj Loj Loj | Ntsig | Ntsig |
| Ntug Exclusion (mm) | ≤ 2.5 µm / ≤ 15 µm | ≤ 5.5 µm / ≤ 35 µm |
| LTV / Tais / Warp | ≤ 3 µm | ≤ 3 µm |
| Roughness | Polish Ra ≤ 1.5 µm | Polish Ra ≤ 1.5 µm |
| Ntug Chips Los ntawm High Intensity Light | ≤ 20 µm | ≤ 60 µm |
| Thaum tshav kub kub daim hlau los ntawm High Intensity Light | Kev sib tw ≤ 0.05% | Kev sib tw ≤ 3% |
| Polytype Areas Los Ntawm Lub Teeb Siab Siab | Kev pom cov pa roj carbon monoxide ≤ 0.05% | Kev sib tw ≤ 3% |
| Silicon Surface Scratches Los ntawm High Intensity Light | ≤ 0.05% | Kev sib tw ≤ 4% |
| Ntug Chips Los Ntawm Lub Teeb Siab Siab (loj) | Tsis Tso Cai> 02 mm Dav thiab qhov tob | Tsis Tso Cai> 02 mm Dav thiab qhov tob |
| Txoj Kev Pab Screw Dilation | ≤ 500 µm | ≤ 500 µm |
| Silicon Surface Contamination Los ntawm High Intensity Light | 1 x 10^5 | 1 x 10^5 |
| Ntim | Multi-wafer Cassette lossis Ib Lub Thawv Wafer | Multi-wafer Cassette lossis Ib Lub Thawv Wafer |
4-Inch 4H-Semi Insulating SiC Substrate Specification
| Parameter | Zero MPD Qhuav Qib (Z Qib) | Qib Dummy (D qib) |
|---|---|---|
| Lub cev muaj zog | ||
| Txoj kab uas hla | 99.5mm-100.0 hli | 99.5mm-100.0 hli |
| Poly-hom | 4H | 4H |
| Thickness | 500 μm ± 15 μm | 500 μm ± 25 μm |
| Wafer Orientation | Ntawm axis: <600h> 0.5° | Ntawm axis: <000h> 0.5° |
| Cov khoom hluav taws xob | ||
| Micropipe Density (MPD) | ≤1cm⁻² | ≤15 cm⁻² |
| Kev tiv thaiv | ≥150 Ω·cm | ≥1.5 Ω·cm |
| Geometric Tolerances | ||
| Thawj Txoj Kev Ncaj Ncees | (0x10) ± 5.0° | (0x10) ± 5.0° |
| Qhov Loj Loj Loj | 52.5 hli ± 2.0 hli | 52.5 hli ± 2.0 hli |
| Secondary Flat Length | 18.0 hli ± 2.0 hli | 18.0 hli ± 2.0 hli |
| Secondary Flat Orientation | 90 ° CW ntawm Prime tiaj tus ± 5.0 ° (Si ntsej muag) | 90 ° CW ntawm Prime tiaj tus ± 5.0 ° (Si ntsej muag) |
| Ntug Exclusion | 3 hli | 3 hli |
| LTV / TTV / Hneev / Warp | ≤2.5 μm / ≤5 μm / ≤15 μm / ≤30 μm | ≤10μm / ≤15μm / ≤25μm / ≤40μm |
| Nto Zoo | ||
| Nto Roughness (Polish Ra) | ≤ 1 nm | ≤ 1 nm |
| Nto Roughness (CMP Ra) | ≤ 0.2nm | ≤ 0.2nm |
| Ntug Cracks (High-Intensity Light) | Tsis tso cai | Qhov ntev ≥10 hli, ib qho tawg ≤2 hli |
| Hexagonal Phaj Defects | ≤0.05% thaj tsam sib sau | ≤0.1% cheeb tsam sib sau |
| Polytype Inclusion Areas | Tsis tso cai | ≤1% cheeb tsam sib sau |
| Visual Carbon suav nrog | ≤0.05% thaj tsam sib sau | ≤1% cheeb tsam sib sau |
| Silicon Surface Scratches | Tsis tso cai | ≤1 wafer txoj kab uas hla cumulative length |
| Ntug Chips | Tsis pub muaj (≥0.2 hli dav / qhov tob) | ≤5 nti (txhua ≤1 hli) |
| Silicon Surface Contamination | Tsis tau teev tseg | Tsis tau teev tseg |
| Ntim | ||
| Ntim | Multi-wafer cassette los yog ib lub thawv wafer | Multi-wafer cassette los yog |
Daim ntawv thov:
CovSiC 4H Semi-Insulating substratesfeem ntau yog siv nyob rau hauv high-power thiab high-frequency electronic devices, tshwj xeeb tshaj yog nyob rau hauv lubRF teb. Cov substrates no tseem ceeb heev rau ntau yam kev siv xws limicrowave kev sib txuas lus systems, Phase array radar, thiabwireless hluav taws xob ntes. Lawv cov thermal conductivity thiab cov yam ntxwv zoo ntawm hluav taws xob ua rau lawv zoo tagnrho rau kev thov hauv cov hluav taws xob hluav taws xob thiab kev sib txuas lus.
SiC epi wafer 4H-N yam khoom thiab daim ntawv thov
